The present invention relates generally to the field of semiconductor fabrication, more particularly, to automated design of a reticle layout for use in manufacturing a reticle used in a photolithography process during semiconductor fabrication, and to a reticle made using such a design.
In the manufacture of semiconductor chip devices, photolithographic processes are often used to pattern various layers on a wafer in order to produce circuit features positioned as specified in a circuit layout. In such processes, a layer of resist (also referred to as xe2x80x9cphotoresistxe2x80x9d) is deposited on the layer being patterned, and the resist is then exposed using an exposure tool and a template. These templates are known in the art as reticles or masks. For purposes of the present application, the term reticle includes both reticles and masks, and the two terms are interchangeable herein. During the exposure process, the reticle is imaged onto the resist by directing a form of radiant energy such as ultraviolet light through the reticle to selectively expose the resist in a desired pattern. The pattern which is produced in the resist is referred to herein as a xe2x80x9cfeature layoutxe2x80x9d. One preferred device for creating such exposure is known as a xe2x80x9cstepperxe2x80x9d.
One type of reticle which has been used is referred to as a binary reticle. A binary reticle includes reticle features, namely transparent features (areas through which exposure passes) and opaque features (areas which block exposure). The design of the reticle features is typically shown in a two-dimensional xe2x80x9cbinary reticle layoutxe2x80x9d, although the reticle itself typically includes two or more layers (e.g., a transparent layer and a patterned opaque layer). The shape, orientation and position of each feature in a binary reticle typically correspond to the shape, orientation and position of the corresponding feature in the circuit layout. In use, radiant energy is directed toward the binary reticle, and the radiant energy is blocked by the opaque areas but passes through the transparent areas to pattern-wise expose the resist. After pattern-wise exposure, the resist is developed to remove either the exposed portions of the resist (a positive resist) or the unexposed portions of the resist (a negative resist), thereby forming a patterned resist on the layer being patterned. The patterned resist is then used to protect a corresponding pattern of underlying areas on the layer during a subsequent fabrication process or processes, such as deposition, etching or ion implantation processes. Thus, the patterned resist prevents or substantially prevents the effects of the fabrication process(es) from being produced in the layer in areas of the layer which lie beneath portions of the resist which have not been removed. The reticle is designed to expose the resist in a pattern which corresponds to the feature or features which are desired to be formed.
There are a number of effects caused by diffraction of exposure which tend to distort the patterns formed in a resist, i.e., which cause the pattern formed in a resist to differ from the binary reticle layout. Due to limitations imposed by the wavelength of light used to transfer the pattern, resolution degrades at the edges of the patterns of the reticle. Such degradation is caused by the diffraction of the exposure such that the exposure is spread outside the transparent areas.
There has been an ongoing need to increase the density of features contained in semiconductor devices, by making the features smaller and/or reducing the amount of space between features. Advances in feature density have required that reticles include correspondingly smaller and/or more densely packed features, and as a result, reticle layouts have become increasingly complex.
The extent to which the size of features printed by photolithographic methods can be reduced, and the extent to which gaps between those features can be reduced, are limited by the resolution limit of the exposure device. The resolution limit of an exposure tool is defined as the minimum feature dimension that the exposure tool can repeatedly expose onto the resist, and is a function of the wavelength of exposure emitted by the stepper, the aperture through which exposure is emitted, the depth of focus and other factors. Thus, reticle design is limited in that the gaps between respective features on the reticle (i.e., transparent regions, opaque regions and/or phase shifted regions) must be large enough for the circuit features to be correctly printed.
The critical dimension (CD) of a circuit pattern is defined as the smallest width of a line in the pattern, or the smallest space between lines in the pattern. The CD thus directly affects the size and density of the design. As the density of features in a pattern is increased, the CD of the design approaches the resolution limit of the stepper. As the CD of a circuit layout approaches the resolution limit of the stepper, the diffraction of exposure causes increasingly significant distortions of the pattern being created.
Due to limitations imposed by the wavelength of light used to transfer the pattern, resolution degrades at the edges of the patterns of the reticle. Such degradation is caused by diffraction of the exposure such that it is spread outside the transparent areas. Phase shift masks (PSMs) have been used to counteract these diffraction effects and to improve the resolution and depth of images projected onto a target (i.e., the resist covered wafer). There are a variety of PSMs. One kind of PSM includes transparent areas through which light passes but is phase shifted, e.g., by 180 degrees relative to transparent areas located adjacent to, but on the opposite side, of opaque areas. Attenuated PSMs utilize partially transmissive regions which pass a portion of the exposure, e.g., about three to eight percent, out of phase with exposure through transparent areas. In PSMs, the images of the phase-shifted and unphase shifted areas interfere, destructively reducing the spread of the image, thereby improving resolution. Phase shift masks can thereby increase image contrast and resolution without reducing wavelength or increasing numerical aperture. These masks can also improve depth of focus and process latitude for a given feature size. Designs of such reticles typically are represented using one or more two-dimensional reticle layouts including appropriate reticle features, e.g., selected from among transparent features, opaque features, phase shifting features and/or phase shifting attenuating features.
There is an ongoing need for techniques for designing phase shift masks which can reliably print more densely packed circuit layouts having smaller circuit features. In addition, there is a need for techniques for generating phase shift masks which can reliably print feature layouts which more closely match desired circuit layouts. Also, there is a need for techniques which can convert a circuit layout into a phase shift mask layout in which a larger percentage of the steps in such conversion can be carried out on a computer. Furthermore, there is an ongoing need for such techniques which can carry out such conversions while expending less computer time and equipment.
The present invention provides a method for designing reticles which can be used to produce circuit designs having densely packed circuit features, in which the variance between the actual exposure pattern and the desired exposure pattern is reduced. In addition, the present invention provides a method for converting a circuit layout into a phase shift mask layout, in which a larger percentage of the steps in such conversion can be carried out on a computer. Furthermore, the present invention provides techniques which can carry out such conversions while expending less computer time and equipment.
The present invention provides a machine implemented method of producing a mask design, comprising:
(a) inputting a binary mask layout comprising at least one cell and/or at least one hierarchy of cells, a hierarchy of cells being defined as a plurality of cells containing mask features, the plurality of cells being arranged in a cell hierarchy;
(b) examining each cell in the binary mask layout and determining if the cell contains at least one printable shape;
(c) if the examined cell contains at least one printable shape, determining if each printable shape will print desired features in a wafer fabrication process and if so, leaving it alone;
(d) if any printable shape will not print desired features in the wafer fabrication process, placing phase shifters next to the shape so that it will print desired features;
(e) repeating steps (b) through (d) until all cells are examined and altered as necessary; and
(f) after completion of steps (a) through (e), using the cells in said hierarchy to produce a reticle.
The reticle produced in step (f) is preferably a phase shift reticle.
In one preferred embodiment, step (d) comprises generating a 180 degree phase shift mask pattern from the shapes of the examined cell.
In a preferred embodiment, further steps are conducted to generate 120 degree and 60 degree phase shapes based on 180 degree shapes which have been generated.
The present invention is further directed to integrated circuits which incorporate one or more components made using any of the reticles according to the present invention, e.g., the reticles of the present invention can be used in making such components.
These and other features and advantages of the invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention which is provided in conjunction with the accompanying drawings. The invention is not limited to the exemplary embodiments described below and it should be recognized that the invention includes all modifications falling within the scope of the attached claims.